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来源：百度知道 编辑：UC知道 时间：2024/05/27 11:17:08
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications,requiring very short propagation delay times.In high-performance memory systems these decoders can be used to minimize the effects of system decoding.When used with high-speed memories,the delay times of these decoders are usually less than the typical access time of the memory.This means that the effective system delay introduces by the decoder is negligible.
The DM74LS138 decodes one-of-eight lines,based upon the conditions at the three binary select inputs and the three enable inputs.Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.A 24-line decoder can be implemented with no external inverters,and a 32-line decoder requires only one inverter.An enable input can be used as a data input for demultiplexing applications.
The DM74LS139 comprises two separate two-line-to-four-line decoders in
The DM74LS138 decodes one-of-eight lines,based upon the conditions at the three binary select inputs and the three enable inputs.Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.A 24-line decoder can be implemented with no external inverters,and a 32-line decoder requires only one inverter.An enable input can be used as a data input for demultiplexing applications.
The DM74LS139 comprises two separate two-line-to-four-line decoders in
这些肖特基钳位电路设计用来在高效能记忆体解码或数据路由应用，需要在很短的传播延迟times.in高效能记忆体系统，这些解码器可用于减少的影响，系统decoding.when使用超高速记忆体，延误的时候，这些解码器通常少于典型的存取时间的memory.this ，即有效的制度，毫不拖延地介绍了由解码器是微不足道。
该dm74ls138解码1 - -八线，根据条件在三个二元选择的投入和三使inputs.two有源低一主动，使高投入，减少所需的外部盖茨或逆变器时， expanding.a 24在线解码器，可以实施同任何外部逆变器，和一个32线解码器，只需要一inverter.an ，使输入可被用来作为数据输入为解复用的应用。
该dm74ls139包括两个单独的两线至四线的解码器，在一个单一的package.the积极的低投入，使可被用来作为数据线，在解复用的应用。
所有这些解码器/解复用器功能完全缓冲的投入，提出了只有一个正常化的负荷其驾驶circuit.all投入的钳制与高性能肖特基二极管的压制线振铃，并简化了系统设计。