UC知道求解一道晶体管设计问题（高分）
来源：百度知道 编辑：UC知道 时间：2024/06/08 13:59:27
设计一个CMOS电路包含两个输入的NOR gate
写出电路的layout (plan view)， 计算晶体管的aspect ratio (W/L).电路的layout (plan view) 需要包括VDD 和地线，但没有bond pads.
规格:
VDD=3V, VT=0.3V, 2, electron mobility , hole mobility , minimum feature size 0.3um, maximum alignment error 0.3um. The area of the circuit should be a minimum.
Understanding Alignment and minimum feature size:
The minimum feature size is the smallest dimension that be defined on a chip. This will often be the channel length L.
The various layers have to be aligned (registered) with each other. This involves some error in placing any mask relative the pattern already on the silicon. It is necessary to know large (in microns) the error can be. You must allow for this in the design.
最好在本周日晚前完成 谢谢！
规格:
VDD=3V, VT=0.3V, Co=0.0004, electron mobility=0.1 , hole mobility=0.05 , minimum feature size 0.3um, maximum alignment error 0.3um. The area of the circuit should be a minimum.
写出电路的layout (plan view)， 计算晶体管的aspect ratio (W/L).电路的layout (plan view) 需要包括VDD 和地线，但没有bond pads.
规格:
VDD=3V, VT=0.3V, 2, electron mobility , hole mobility , minimum feature size 0.3um, maximum alignment error 0.3um. The area of the circuit should be a minimum.
Understanding Alignment and minimum feature size:
The minimum feature size is the smallest dimension that be defined on a chip. This will often be the channel length L.
The various layers have to be aligned (registered) with each other. This involves some error in placing any mask relative the pattern already on the silicon. It is necessary to know large (in microns) the error can be. You must allow for this in the design.
最好在本周日晚前完成 谢谢！
规格:
VDD=3V, VT=0.3V, Co=0.0004, electron mobility=0.1 , hole mobility=0.05 , minimum feature size 0.3um, maximum alignment error 0.3um. The area of the circuit should be a minimum.
倒不是没人能做。。。但你看这种设计不是几句话就解决，而是需要好几个小时的labour...还要Layout...谁能给做？
有水平能回答问题，最多也是花几分钟敲敲键盘，那是个兴趣问题。但是几个小时工作没有钱赚。。给再多分估计也没人肯吧。。别说工程师，麦当劳端个盘子几小时那是什么回报？200分？
easy,but hard ro write.
you know?
your english is poor..
呵呵，这个专业性好强啊，想必你是学这个专业的吧，我是学计算机的，不能帮你哈，想必百度知道里也没多少人回清楚地回答出来，所以我建议你还是去找一下专业性强的网站，找站长或者里面的主要作者，困难总是有的，希望你能找到答案哈^-^
据我多年百度知道里混迹，
这种技术问题很难有人回答。
电源电压(Supply voltage)(V): 3 to 16
H 输入电压(H input voltage)(V): 3.5(Min.)
L 输入电压(L input voltage)(V): 1.5(Max.)
滞后电压(Hysteresis voltage)(V): -
H 输出电压(H output voltage)|Iout|<1uA(V): 4.95(Min.)
L 输出电压(L output voltage)|Iout|<1uA(V): 0.05(Max.)
传播延迟时间(Propagation delay)(ns): 85(Typ.)
去专业网站上求助吧