急!20分求高手帮忙翻译设计说明!!
来源:百度知道 编辑:UC知道 时间:2024/05/18 07:29:57
本设计采用数字锁相法,在锁相环路中插入可变分频器8253,这种频率合成器采用了数字控制的部件,压控振荡器的输出信号在与基准信号进行相位比较之前进行N次分频,压控振荡器的输出频率由分频比N来决定。当环路锁定时,压控振荡器的输出频率与其准频率的关系是fo=Nfr。从这个关系式看出,数字式频率合成器是一种数字控制的锁相倍频器。其输出频率是基准频率的整数倍。通过频率选择开关或设置分频比N,使压控振荡器的输出信号频率将被控制在不同的频道上。再通过AT89S52的扩展,采用键盘输入分频比,LED显示输出频率,完成简易单片机可控分频的频率合成器。
At present, with the development of digital technology and electronic micro-controller system in the broad application to a large extent changed the traditional design methods, digital frequency synthesis technology applications have also been extensive. Digital Frequency Synthesizer for communications equipment, making the choice of frequency is very simple and precise. And with the large-scale integrated circuits (LSI) technology and microcomputer technology is developing rapidly, contribute significantly to the digital PLL frequency synthesizer integration and the increased size of the reduction communications equipment to meet the high-integration and miniaturization requirements. The design of digital lock-in, the PLL inserted Variable Frequency Divider 8253. This frequency synthesizer using a digital control components VCO output signal with the signal benchmarks comparing the phase before the N-th frequency, VCO output frequency from the frequency than N to decide. When the l