UC知道求翻译，急啊~~~
来源：百度知道 编辑：UC知道 时间：2024/06/05 14:03:23
THE PROBLEM
Traditionally, the method of testing electronic assemblies for structural faults has been In-Circuit Test. This practice applies electrical stimuli to the Device-Under-Test (DUT) and measures the response using physical probes that make contact with the DUT via test-pads on each electrical node. The physical nails are arranged within a test fixture, commonly referred to
as a “bed-of-nails”, which is unique for each DUT. Despite the vast capabilities of ICT, board designers are finding it increasingly difficult to provide sufficient nodal access for this test technique, leading board manufacturers to rely on other test methods to ensurestructural integrity before advancing to the next process step – usually functional test. Several factors contribute to the decrease in placement of test pads including
:1. Blind or hidden traces not accessible on either side of the board.
2. Direct access to package pins is not possible in the case of new SMT package types
Traditionally, the method of testing electronic assemblies for structural faults has been In-Circuit Test. This practice applies electrical stimuli to the Device-Under-Test (DUT) and measures the response using physical probes that make contact with the DUT via test-pads on each electrical node. The physical nails are arranged within a test fixture, commonly referred to
as a “bed-of-nails”, which is unique for each DUT. Despite the vast capabilities of ICT, board designers are finding it increasingly difficult to provide sufficient nodal access for this test technique, leading board manufacturers to rely on other test methods to ensurestructural integrity before advancing to the next process step – usually functional test. Several factors contribute to the decrease in placement of test pads including
:1. Blind or hidden traces not accessible on either side of the board.
2. Direct access to package pins is not possible in the case of new SMT package types
这个问题,
传统上,电子部件的测试方法,对结构缺陷已在线测试。这个练习运用电刺激的Device-Under-Test(大连)和措施进行了回应,用身体接触DUT test-pads通过每个电子节点。物理钉子被安排在一个测试夹具,通常简称
作为一个“把带有这种探针”,这是每个DUT独特。尽管辽阔的能力,设计师ICT越来越难以提供足够的节点访问这个测试技术的领先制造商,董事会依赖其它ensurestructural完整性检测方法,供下道工序前一步-通常进行功能测试。几个因素有助于减少测试点的位置等
:1。盲人或隐藏的痕迹无法得到董事会的两边。
2。包装直接存取针不可能在新SMT包装类型,如Array-Style和Chip-Scale包装。
3。密集电路卡片没有物理空间充分测试点被放置在布局。
4。禁止使用高性能系统的测试点来避免引进电磁噪声。
作为测试覆盖率的错误恶化时,通过对后续工艺板,一般功能性或制度逐步增加。测试诊断的构造断裂在这个阶段通常是困难的,耗时由于模稜两可的诊断信息。这可能导致“骨板桩”的构造断裂,包含极其困难的诊断,
或者可能需要工程相关识别的根本原因,最终导致失败,可能会推迟分娩更大的成本…出于成本提高与未在客观上—断裂构造测试阶段,减少物理存取限制的有效性,板制造商的科技依托的选择,免费测试策略,除了-或代替- ICT,如自动化x光检查(阿喜),utomated光学检查(葵、飞针测试(FPT)和最常见的数位设计、边界。