想用VHDL做这个三彩灯，请问怎么做？

来源：百度知道 编辑：UC知道 时间：2024/06/02 16:56:54
某晚会用红绿黄3组彩灯采光，3组灯亮的顺序是：红灯亮—绿灯亮—黄灯亮—红绿灯亮—绿黄灯亮—黄红灯亮—全亮—全暗。重复以上过程，试设计这三组灯的控制电路。输入时钟频率为500Hz，灯亮的时间在1—4秒之间，可以自由控制。电路中以“1”代表灯亮，以“0”代表灯灭。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity jlp1 is
Port ( clk,rst:in std_logic;
red,green,yellow:out std_logic);
end jlp1;

architecture Behavioral of jlp1 is
signal count:integer range 1 to 80;

begin
p1:process(clk)
begin
if rst='1' then
count<=1;
elsif clk'event and clk='1' then
if count=80 then
count<=1;
else
count<=count+1;
end if;
end if;
end process p1;

p2:process(clk)
begin
if count<=10 then
red<='1';
green<=&#