帮忙翻译下英文摘要!!跪求!!
来源:百度知道 编辑:UC知道 时间:2024/05/16 15:44:18
本课题的数字频率计设计,完全使用一块复杂可编程逻辑器件CPLD(Complex Programmable Logic Device)芯片EPM7128SLC84-15实现整个电路的测试信号控制、各种时序逻辑控制、计数功能、数码管的显示输出。在MAX+PLUSII、QUARTUS软件平台上,用VHDL语言编程完成了CPLD的软件设计、编译、调试、仿真和下载。不但大大缩短了开发研制周期,而且使本系统具有结构紧凑、体积小、可靠性高、测频范围宽、精度高等优点。本文详细论述了系统自上而下的设计方法及各部分硬件电路组成及CPLD的软件编程设计。
Design the realm in the electronics, along with the extensive application of the technical development and the programmable logic machine piece of calculator technique, large scale integration technique, EDA( the Electronics Design Automation), traditional from under but up of numerical electric circuit design method, tool, the machine piece has already got behind with far and far technical development nowadays.According to the technique of EDA and the hardware description language of from top to bottom of design technique is undertaking to rise more and more numerical system design mission.This text first overview technical development general situation of EDA, the process, advantage of the FPGA/ CPLD development, the history of the VHDL language, development step and its advantage;Then introduced the general theory that frequency measure;Use the technique of EDA immediately after, completed the numerical frequency to account the design work of the system with the language of VHDL